1. Field of the Invention
The present invention relates to a thin film transistor array substrate. More particularly, the present invention relates to a thin film transistor array substrate which is not be easily damaged by the discharged static electricity.
2. Description of Related Art
In recent years, with the progressive manufacturing technique in optoelectronics and semiconductor fields, the flat panel display apparatuses are growing rapidly. Wherein the liquid crystal display (LCD) apparatus has become the mainstream in the liquid crystal display apparatuses due to its low operating voltage, low radiation, light weight and thin thickness.
A traditional liquid crystal display (LCD) apparatus mainly comprises a LCD panel and a back light module, wherein the LCD panel generally comprises a thin film transistor (TFT) array substrate, a color filter (CF) array substrate and a liquid crystal layer disposed therebetween. Tiny lines and devices such as a plurality of scan lines, data lines and pixel units are formed on the TFT array substrate by the semiconductor manufacturing process.
FIG. 1 is a schematic view of a circuitry of a conventional TFT array substrate. Referring to FIG. 1, the conventional TFT array substrate 100 comprises a substrate 110, a plurality of pixel units 120, a plurality of scan lines 130 and data lines 140. The substrate 110 has a pixel area 112 and a peripheral area 114 adjacent to the pixel area 112. The pixel units 120 are disposed in the pixel area 112, wherein each pixel unit 120 is composed of a TFT 122 and a pixel electrode 124. The scan lines 130 and data lines 140 are disposed in the pixel area 112 of the substrate 110 and electrically connected with the pixel units 120, wherein one end of each scan line 130 extending to the peripheral area 114 is a bonding pad 132 for the scan line 130, and one end of each data line 140 extending to the peripheral area 114 is a bonding pad 142 for the data line 140.
FIG. 2 is an enlarged schematic view of a pixel area in area A shown in FIG. 1. Referring to FIG. 2, another end of each data line 140 extending to the peripheral area 114 is an end part 144 of the data line 140, and the end part 144 of the data line 140 is disposed over the outmost scan line 130 and exceeds the outmost scan line 130. In addition, another end of each scan line 130 extending to the peripheral area 114 is an end part 134 of the scan line 130, and the end part 134 of the scan line 130 is disposed under the outmost data line 140 and exceeds the outmost data line 140.
A plurality of electrostatic charges may be accumulated during the aforementioned manufacturing process of TFT array substrate 100, for example, especially when the manufacturing equipment and the operators touch the TFT array substrate 100 frequently. However, when the electrostatic charges on the TFT array substrate 100 are accumulated to a critical value will lead to generate the electrostatic discharge phenomenon.
More specifically, a manufacturing process of the data line 140 shown in FIG. 2 comprises the following steps. First, a metal film (not shown) is formed completely over the substrate 110. And then the metal film is photo-lithographed and etched to form the data line 140. It should be noted that during the manufacturing process of the metal film, because a large number of electrostatic charges are accumulated in the manufacturing equipment and an end part of a semiconductor layer (not shown) is located under the end part 144 of the data line 140, a plurality of electrostatic charges can be easily accumulated on the end part of the semiconductor layer, so as to damage the end part of the semiconductor layer.
Therefore, after the metal film is photo-lithographed and etched to form the data line 140, the end part 144 of the data line 140 touches with the end part of the semiconductor layer damaged by the electrostatic charges. So the short-circuit between the data line 140 and the scan line 130 is generated and leads to some defects of display quality such as white lines or black lines shown on a display panel.
In addition, because the lines and devices on the TFT array substrate 100 are so tiny, the main circuits and devices will be vulnerable to the electrostatic discharge phenomenon. It should be noted that the electrostatic charges are easily concentrated on the end part 134 of the scan line 130 and the end part 144 of the data line 140 shown in FIG. 2 and then the electrostatic discharge phenomenon is generated. Therefore, the short-circuit between the different layers (upper layer and lower layer) of lines will be generated due to the high voltage resulted from the point discharge on the end part 134 of the scan line 130 and the end part 144 of the data line 140, so the TFT array substrate 100 can not function well.
In order to reduce the foregoing adverse effect, damaged by electrostatic charges, a plurality of electrostatic protection devices (not shown) are disposed in the peripheral area 114 of the TFT array substrate 100, wherein the protection devices are electrically connected with the source lines and the gate lines in series via a plurality of switch devices. When the electrostatic charges on the lines of the substrate 100 or in the pixel unit 120 exceed a critical value, the switch devices are opened and disperse the electrostatic charges to the electrostatic protection devices to lower the electrostatic discharge phenomenon. However, the layout of the peripheral area 114 is complicated by utilizing the above-mentioned method, disposing the electrostatic protection devices, so that the area of layout is not enough. Hence, it has an adverse effect in simplifying the manufacturing process and enhancing the production efficiency.